• A Clock less, Multi-Stable, CMOS Analog Circuit.
  • An Improved Design of Key Analog Circuits in CMOS Image Sensor
  • Frequency Compensation in Two-Stage Operational Amplifiers for achieving High 3-db Bandwidth.
  • Circle Equation-Based Fault Modeling Methodfor Linear Analog Circuits.
  • Indirect Miller Effect Based Compensation in Low Power Two-Stage Operational Amplifiers.
  • Analog Circuit Design Using Tunnel-fets.
  • Ultra-Low-Voltage Operation ofCMOS Analog Circuits: Amplifiers,Oscillators, and Rectifiers.
  • N-Channel Dual-Workfunction-Gate MOSFET forAnalog Circuit Applications.
  • Steady State Computation and Noise Analysis of Analog Mixed Signal Circuits.
  • New Possibilities and Trends in Circuit Design for Analog Signal Processing.
  • Offset Reduction in Operational Amplifiers using Floating Gate Technology and LMS Algorithm.
  • A  Method  of  Analog  Circuit  Optimization  Using Adjoint  Sensitivity  Analysis
  • Area and power optimized multipliers with minimum leakage.
  • Comparison and analysis of combinational circuits using different logic styles.
  • Combinational circuits without false paths.
  • Fast 32-bit digital multiplier.
  • Fully cmos programmable voltage adder/subtractor.
  • Optimization of combinational logic circuits through decomposition of truth table and evolution of sub-circuits.
  • Low-power design techniques for high-performance cmos adders.
  • Variable input delay cmos logic for low power design.
  • Analysis of metastability performance in digital circuits on flip-flop.
  • A translinear-based implementation of digital logic gates using only cmos in current-mode.
  • Optimized power performance and simulation of reversible logic multiplexer.
  • Vlsi implementation of reduced complexity wallace multiplier using energy efficient cmos full adder.
  • An improved design of combinational digital circuits with multiplexers using genetic algorithm
  • Mixed-Signal VLSI Design in 0.5μm Process of Nano-Power Subcompact Mirror Amplifier for Accusensor.
  • CMOS Current Steering Logic for Low-Voltage Mixed-Signal Integrated Circuits.
  • A 3.8-ns CMOS 16 x 16-b Multiplier Using Complementary Pass-Transistor Logic.
  • The Design of A Low-Power Low-Noise Phase Lock Loop.
  • Ultra-High Bandwidth Fully-Differential Three-Stage Operational Amplifiers in 40nm Digital CMOS.
  • Wide Output Swing Inverterfed Modified Regulated CASCODE Amplifier for Analog and Mixed-Signal Applications.
  • A Digital-Based Analog Differential Circuit.
  • A low open-loop gain, high-PSRR, micro power CMOS amplifier for mixed-signal applications.
  • Circuit Techniques for CMOS Low-Power High-Performance Multiplier.
  • An Efficient Mixed-Signal 2.4-ghz Polar PowerAmplifier in 65-nm CMOS Technology.

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