Verification and testing is the most crucial step of chip designing process in VLSI industry.

VERIFICATION

Extraction of all the parasitic information from the design is the first step in full-chip verification. The extraction of signal and power nets is followed by analysis of all the transistors must be done for potential problems.

There are some full chip verification techniques which are as follows:

Functional verification

  • Integrated functionality of block is focused.
  • CPU executes all the interrupts and the system bus is drives by CPU.
  • All connections in the chip are tested.
  • Verification of all test and functional modes are verified.
  • Pad to block or block to pad connectivity.
  • Testing of all peripherals and MCU/DSP integrated with everything.

Timing Verification

Time verification is essential to find out the critical path delay.

 
Timing Verification

Signal Verification

By using Signal verification analysis of three factors can be done three:noise, timing, and consistency.

Power Verification

As power is the main issue for this digital era so power verification plays a vital role in chip designing. Due to badly designed power distribution system more failures can be seen. By using power verification these systems can be improved

Clock Verification

Clock is one of the acute net in a synchronous system. Clock controlled the delay of the design with waveform shape and skew.

 TESTING

Testing is applied at various steps of hardware manufacturing. There are various methods of testing some of them are as follows.

BIST (BUILT IN SELF TECHNIQUE)

By using BIST system can test itself, it has higher reliability and less number of test cycles. It contains the concept of pseudo random number generator and cyclic redundancy check.

ATPG (AUTOMATIC TEST PATTERN GENERATION)

According to this technique attest pattern is generated to find out the correct and faulty behavior of a circuit.

MEMORY TESTING

It is used to find out the functional behavior of a circuit. It used to detect the two type of faults in the memory i.e. permanent fault and non-permanent fault.

BOUNDARY SCAN

Boundary scan is a debugging method used to find out the interconnection fault inside an integrated circuit at printed circuit board.