M.Tech Projects | M.tech Thesis

M.Tech Projects: Our R&D team provides the research guidance and support for IEEE M.tech thesis projects which is considered for the research in M.tech thesis. Our primary research interest covers the Electronics & Communication (Microelectronics & Nano-Electronics) , VLSI and its concomitant domains viz. Low power VLSI, Analog and Advanced Analog Design, Hardware implementation of Digital image processing (DIP) algorithms, Digital Signal Processing and Bio-medical Signal Processing.

SiliconMentor underpins the students in M.tech thesis projects and helps them to brace their technical skills with practical approaches on the EDA tools. The M.tech thesis help can be procured at SiliconMentor with the promising support till the last moment of submission or the satisfaction level.

We also supervise in selection of Master thesis topics in Computer Science, Electronics and Communication, Computer Vision, Machine Learning and Artificial Intelligence along with the assistance in the paper publication process in IEEE journals, Thomson Reuters, Science Citation Indexed journals and various reputed International Journals.


An Updated List for M.tech Thesis projects

Master Thesis Projects in VLSI

Front end design and verification

  • Design of an AMBA-Advanced High performance Bus (AHB) Protocol IP Block
  • Design of Data Encryption Standard (DES)
  • Design of 16 Point Radix-4 FFT (Fast Fourier Transform) Algorithm
  • A Low-Power Multiplier With the Spurious Power Suppression Technique
  • A High-speed 32-bit Signed/Unsigned Pipelined Multiplier
  • Digital Image Authentication from JPEG Headers

Language used:-VHDL, Verilog HDL,System Verilog

FPGA Implementation

  • Design and Implementation of USB 2.0 Transceiver Macro-cell Interface (UTMI) (2010)
  • FPGA Implementation of 3D Discrete Wavelet Transform for Real-Time Medical Imaging
  • Implementation of a Multi-channel UART Controller Based on FIFO Technique and FPGA
  • FPGA Implementation of a Scalable Encryption Algorithm
  • Design and Implementation of an FPGA-based Real-Time Face Recognition System
  • Feature Extraction of Digital Aerial Images by FPGA based implementation of edge detection algorithms
  • FPGA based FFT Algorithm Implementation in WiMAX Communications System
  • Design and Implementation of Low Power Digital FIR Filter based on low power multipliers and adders on xilinx FPGA

Language used:-VHDL, Verilog HDL

M.tech Thesis Projects in Back end CMOS Implementations


  • Schematic and Layout Design of low power flip flop
  • Design of Ultra low power full adder
  • Design of adiabatic 32 bit multiplier using modified booth algorithm
  • Low-Power and Area-Efficient Carry Select Adder
  •  A Magnetic Tunnel Junction Based Zero Standby Leakage Current Retention Flip-Flop
  •  Current-Comparison-Based Domino: New Low-Leakage High-Speed Domino Circuit for Wide Fan-In Gates
  •  Low-Power Pulse-Triggered Flip-Flop Design With Conditional Pulse-Enhancement Scheme IEEE
  •  Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops

Tools used:-TANNER (S-Edit, L-Edit), Cadence Orcad, Laker

Workout:-Implementation, Simulation, Thesis, Paper Publication

MATLAB(Digital Image Processing) Projects for M.tech Thesis

  • Image Processing in Artificial Intelligence with Sensors
  • An Auto adaptive Edge‐Detection Algorithm for Flame and Fire Image Processing
  • Design Guidelines of New Step-up DC/DC Converter for Fuel Cell Powered Distributed Generation Systems
  • A secure semantic transmission method for digital image based on UCL
  • Analysis and Implementation of a Hybrid High-Power-Factor Three-Phase Unidirectional Rectifier
  • The human iris structure and its application in security system of car

Tools used:-Matlab Simulink


  • A wireless surveillance and safety system for mine workers based on Zigbee
  • Speed Dictators For Forced Speed Limiting At Critical Places Using Low Cost RF Transceivers
  • Application of GPRS/CDMA wireless communication technology in rainfall gathering system
  • A practical smart metering using combination of power line communication (PLC) and WiFi protocols

Biomedical Signaling, Image and Video Processing

1. An algorithm to detect Noise-resilient edge in brain MRI images.

2. Development of a hybrid algorithm for segmentation of MRI images based on edge detection.

3. Segmentation of diseased MRI images based on Masking.

4. An enhanced Image Denoising and Segmentation Approach for Detection of Tumor from

2-D MRI Brain Images.

5. Retrieval of MRI images based on texture spectrum and edge histogram equalization.

6. Denoising of Adaptive MRI images with the use of total-variation and local noise estimation.

7. An enhanced algorithm for the denoising of MRI images based on wavelet shrinkage.

8. A Stationary Wavelet Transform algorithm for feature extraction of Brain MRI.

9. Image Enhancement through histogram equalization Using MRI Brain Images.

10. A Histogram equalization algorithm for fusion of MRI and CT brain images.

11. MRI image retrieval based on texture spectrum and edge histogram features.

DSP- Speech Processing

• Suppression of noise from speech signal using spectral subtraction with FPGA

• FPGA Implementation of a cochlear filter.

• Audio de-noising by spectral subtraction technique implemented on reconfigurable hardware.

• Real-Time Embedded Implementation of the Binary Mask Algorithm for Hearing Prosthetics

Audio Processing:

• FPGA Implementation of a Fast MDCT Algorithm.

• Design and Implementation of Viterbi Encoding and Decoding Algorithm on FPGA.