The current era of semiconductor industry is increasing exponentially and this advancement in the semiconductor industry invoking number of challenges in front standard cell designers. Some of the standard cell design challenges are low power, low cost and high speed standard cell design etc.

To design ultra low power consumption circuits, Silicon Mentor is designing its own kind unique standard cell. To meet the highest quality and performance, Silicon Mentor services contain application- specific Low Power standard cell design. Each standard cell is developed to fit a particular target process and application segment. All cells come with optimized circuit design and layout for its best performance in terms of power consumption, speed and lower chip area.

power delay product vs voltage

Standard cell designed at Silicon Mentor provides better performance in power, area and speed in comparison of conventional standard cell. Depending on design objectives, we design high density and ultra low power architectures. These architecture are PVT simulated to check the robustness in very critical conditions.
the whole low power standard cell is designing   using Industry standard tools.

Uniqueness of Our Standard cell Designs

  • Extremely low power and unique cell architecture.
  • Very low supply voltage cells.
  • Controllable output behavior.
  • Highly routing behavior using less number of metals.

power delay product vs frequecny

  • Highly robust checked for maximum process corners analysis.
  • Highest yields.
  • A different layout design
  • All are checked for a large range of frequencies.

power delay product vs temprature